November 30-December 1, 2004
Transfer of Line Edge Roughness during Gate Patterning processes
L. H. A. Leunissen, M. Ercken, M. Goethals, S. Locorotondo, K. Ronse, G. B. Derksen*, D. Nijkerk*, and G. F. Lorusso** (IMEC, *TNO, **KLA-Tencor Corp.)
1
Reduction Technique of Line-Edge Roughness Independent of CD Shift in Gate-Etching Process
Masaru Kurihara and Masaru Izawa (Central Research Lab., Hitachi, Ltd.)
7
Control of Surface Morphology and Etch Selectivity Using Fluorocarbon Film during Dry Etching
Y. S. Chae, H. W. Choi, J. W. Sun, J. Hong, C. H. Shin, G. J. Min, C. J. Kang, H. K. Cho, and J. T. Moon (Semiconductor R&D Center, Samsung Electronics Co., Ltd.)
13
Striation Free Technology for 193nm Photoresist
Chin Ning Wu, Chung Ju Lee, W. T. Shiau, Kuan Liao, S. W. Sun, A. J. Kelly*, G. Vinogradov*, T. Tsukada*, and K. Kawabata* (Central Research and Development Div., United Microelectronics Corp., *Research and Development Div., FOI Corp.)
19
Plasma-induced 193-nm Resist Deformation: Problems and a Possible Solution
H. Struyf, Q. T. Le, T. Dupont, W. Boullart, and S. Vanhaelemeersch (IMEC)
23
Minimizing Plasma Damage of CVD Low-k Materials by Tuning a Two Step Etch Sequence
J. Van Aelst, H. Struyf, Q. T. Le, W. Boullart, S. Vanhaelemeersch, and M. R. Baklanov (IMEC)
29
Atomic-scale Simulation of Passivation Layer Formation during Organic Polymer Plasma Etching
Hideaki Yamada*,*** and Satoshi Hamaguchi** (*Graduate School of Energy Science, Kyoto Univ.,**Graduate School of Engineering, Osaka Univ., ***AIST)
35
Impedance and Etch Characterization of NF3/Ar/He Etching of Damascene SiC Etch-Stop Layer
Magdy Abdelrahman and Makarem Hussein (Portland Technology Development, Intel Corp.)
41
Beam Study on Mechanism of Carbon-Monoxide Assisted Nickel Etching
Hirotaka Toyoda, Yoshinori Kinoshita, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
47
Investigation of Plasma Nitridation of Silicon and its Chemistry for GaN Growth
Tatsuo Ishijima, Takahiro Okada, Yoshio Honda, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
51
Observation of High Energy Particles Incident on Substrate in Magnetron Sputter Deposition
Yohei Sakashita, Hirotaka Toyoda, Yusuke Takagi, J. S. Gao, K. Sasaki, S. Iwata, K. Kato, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
55
Observation of Direct SiO2 Etching by Fluorocarbon Molecules with Argon Ion Bombardment
Noriharu Takada, Hirotaka Toyoda, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
59
Influence of Dielectric Window Material and Pumping Speed on Silicon Film Crystallinity Deposited by Surface Wave Plasma
Yoshihiko Hotta, Hirotaka Toyoda, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
63
Meter-Scale High-Density Microwave Plasma Production with Novel Antenna Coupler Design
Yasuhiro Nojiri, Kazuhiro Takasu,Tatsuo Ishijima, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
67
Two Inherent Photoluminescence Bands in Hafnia and Zirconia
Toshihide Ito*, Motohiro Maeda*, Kazuhiko Nakamura*, Masayuki Takase*, Hiromitsu Kato*,**, and Yoshimichi Ohki* (*Waseda Univ., **AIST)
71
Inert Gas Effects on High Aspect Ratio Contact (HARC) Hole Etching
S. Y. Son, C. H. Shin, Y. J. Kim, G. J. Min, C. J. Kang, and H. K. Cho (Semiconductor R&D Center, Samsung Electronics Co., Ltd.)
77
Electron Density Monitoring by Surface Wave Probe in Magnetic Field
So Yajima, Keiji Nakamura*, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.,*Dept. of Electrical Engineering, College of Engineering, Chubu Univ.)
81
SiO2 Etching and Diagnostics of Radicals in Atmospheric Pressure-Pulsed CF4/Ar Plasma with O2 Addition
Masahiro Iwasaki, Masafumi Ito*, Masaru Hori, Hiroya Kitahata**, and Tsuyoshi Uehara** (Graduate School of Engineering, Nagoya Univ.,*Faculty of Systems Engineering, Wakayama Univ.,**Sekisui Chemical Co., Ltd.)
85
ID Bias Control during W/WN/poly Gate Etching for Nano-scale DRAM Process Integration
Kwang-Ok Kim, Jun-Hyeub Sun, Jin-Ki Jung, Sung-Kwon Lee, Yun-Seok Cho, Dong-Duk Lee, Seung-Chan Moon, Jin-Woong Kim, and Gyu-Han Yoon (Memory R&D Div., Hynix Semiconductor Industries Co., Ltd.)
91
Automatic Recipe Control to Improve Wafer-to-Wafer and Lot-to-Lot Linewidth and Profile Variations of Hardmask Open Process using Integrated Optical CD Measurements
J. W. Shon, D. R. Pirkle, Y. J. Jung*, K. J. Min*, and C. J. Kang* (Lam Research Corp., *Samsung Electronics Corp.)
97
Control of Ion Flux Non-Uniformity on Wafer Caused by Sheath Lens Effect
E. Stamate, N. Holtzer and H. Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
103
Sheath Voltage Estimation for Thick Glass Substrate Etching
Hiroaki Kawata, Hiroshi Toyota*, Masaaki Yasuda, and Yoshihiko Hirai (Graduate School of Engineering, Osaka Prefecture Univ.,*Osaka Science and Technology Center)
107
Fabrication of a MEMS Probe Card with Feedthrough Interconnections
Seong-Hun Choe and Masayoshi Esashi* (Graduate School of Engineering, Tohoku Univ., *NICHe, Tohoku Univ.)
113
Control of Ion Flux Non-uniformity on Wafer Caused by Sheath Lens Effect
Eugen Stamate, Nicolas Holtzer, and Hideo Sugai (Dept. of Electrical Engineering and Computer Science, Nagoya Univ.)
117
Comparision of C4F6 with C4F8 Plasma Process for a-C: F Film Deposition
Hiroki Watanabe, Takumi Tokimitsu, Yasuyuki Egashira*, and Yukihiro Shimogaki (Dept. of Material Engineering, The Univ. of Tokyo,*Graduate School of Engineering Science, Osaka Univ.)
121
Dry Etching of Magnetic Thin Film Stacks using CO/NH3 and CH3OH Gases for Tunneling Magneto-Resistance Devices
Tomoaki Osada, Mihoko Doi, Kiyotaka Sakamoto, Hiroki Maehara, and Yoshimitsu Kodaira (ANELVA Corp.)
127
Sub-65nm Etch Challenges of High-k and Metal Gate Materials
Gowri P. Kota, Shyam Ramalingam, Steve Lee, Bart Coenegrachts, Chris Lee, Stephan Beckx*, Mark Demand*, and Werner Boullart* (Lam Research Corp., *IMEC)
133
Gate Etch Challenges and Requirements for 45-65 nm Technology
Shyam Ramalingam, Qinghua Zhong, Y. Yamaguchi, and C. Lee (Lam Research Co., Ltd.)
139
High-Rate Growth of Highly-Crystallized Si Films from VHF Inductively-Coupled Plasma CVD
Nihan Kosku and Seiichi Miyazaki (Graduate School of Advanced Sciences of Matter, Hiroshima Univ.)
145
Deposition of Titanium-Silicon-Nitride Films for ULSI Cu Diffusion Barrier Application by Flow Modulation Chemical Vapor Deposition
Young-Hoon Shin, Tatsuya Ishii, and Yukihiro Shimogaki (Dept. of Materials Engineering, The Univ. of Tokyo)
151
Optimization of Etching and Ashing Process for Damascene Formation using Porous MSQ Film
Kazuhiro Kubota, Ryuichi Asako*, Shigeru Tahara,Shin Okamoto, Kaoru Maekawa*, and Kunihiko Hinata (AP Gr., ES Process Development Dept., Tokyo Electron AT Ltd., *Process Integration Center, Tokyo Electron AT Ltd.)
157
Polymer Deposition and Radical Composition in Fluorocarbon Plasma Sources
Keiji Nakamura, Hideo Sugai*, Tetsuya Tatsumi**, Atsuhiro Ando**, and Keiji Oshima** (College of Engineering, Chubu Univ.,*Graduate School of Engineering, Nagoya Univ.,**Semiconductor Solutions Network Company, Sony Corp.)
163
Measurements of Electron Density in Low-Density/High-Pressure Plasmas with Surface Wave Probes
Keiji Nakamura, Hideo Sugai*, Naoki Toyoda**, Jun Kawahara***, Osamu Kiso***, and Keizo Kinoshita*** (College of Engineering, Chubu Univ., *Graduate School of Engineering, Nagoya Univ., **Nissin Inc, ***MIRAI, ASET)
169
Numerical Simulation of Long Surface Wave Produced Plasma Cable
Shamim Ahmad, Kiyohide Baba, Keiji Nakamura, and Shunjiro Ikezawa (Dept. of Electrical Engineering, Chubu Univ.)
175
Negative Bias Etching for ArF Process
Yuki Chiba, Shin Okamoto, Kazuhiro Kubota, and Kunihiko Hinata (Tokyo Electron AT Ltd.)
181
Plasma Non-Uniformities Due to Electromagnetic Effects in Large Area Capacitive Discharges
P. Chabert, A. Perret, J.-L. Raimbault, J.-M. Rax, and M.A. Lieberman* (LPTP, Ecole Polytechnique, *EECS, UC Berkeley)
187
Behavior of Flaked Particles in a Magnetically Enhanced Reactive Ion Etching Equipment
Tsuyoshi Moriya*,**, Hiroshi Nagaike*, Manabu Shimada**, and Kikuo Okuyama** (*ESD Development Dept., Tokyo Electron AT Ltd., **Graduate School of Engineering, Hiroshima Univ.)
193
CD-Uniformity Control Knobs for the Dual-Frequency Gate Etcher
Lee Chen, Yuji Tsukamoto, Fumihiko Higuchi, Masaaki Hagihara, Yohei Yamazawa*, Tetsuya Tatsumi**, and Atsushi Kawashima** (LLC, Tokyo Electron Massachusetts, *Tokyo Electron AT Ltd., **SONY Corp.)
199
Prediction of UV Radiation Damages in Several Insulator Films using On-wafer Monitoring Technique
Yuji Kato*, Yasushi Ishikawa*, Mitsuru Okigawa*,**, and Seiji Samukawa* (*Institute of Fluid Science, Tohoku Univ., **Sanyo Electric Co., Ltd)
205
Plasma-Resistant Glass
Kazuyoshi Arai, Shinkichi Hashimoto, and Tsutomu Takahata (Tokyo Research Lab., TOSOH Corp.)
211
New Ash Challenges for Porous Low-k Integration: Trade-off between Sidewall Film Modification and Increase in k Value
N. Posseme, T. David*,**, T. Chevolleau*, L. Vallier*, P. Meininger**, O. Louveau, M. Fayolle**, and O. Joubert* (ST Microelectronics, *CNRS/LTM, **CEA/LETI)
217
Controlling Low-k Damage During in situ Photoresist Strip
Eric A. Hudson, Tom Choi, Odette Turmel, Lily Zheng, Kenji Takeshita, Sangheon Lee, Alexei Marakhtanov, and Peter Cirigliano (Lam Research Corp.)
223
Dry Etching Damage in Porous Silica Low-k Films and its Recovery by Organosiloxane Vapor Treatment
Tetsuo Ono, Keizo Kinoshita, Takashi Goto, Hideki Takahashi, Nobutoshi Fujii, Yuzuru Sonoda, Yoshiaki Oku, Kazuo Kohmura, Nobuhiro Hata*, and Takamaro Kikkawa*,** (MIRAI, ASET, *Advanced Semiconductor Research Center, AIST, **Research Center for Nanodevices and Systems, Hiroshima Univ.)
229
Quantitative Control of Plasma-surface Interactions for Low-k/Cu Integration
Tetsuya Tatsumi, Keiji Oshima, Koichi Yatsuda*, Takeshi Shibahara*, Kazunori Nagahata, Takahiro Saitoh, Masaki Okamoto, Yoshihiro Kiyonobu, Kaoru Hanada*, Youichi Nogami*, Yasushi Morita*, and Keiji Shinohara (Sony Corp., *Sony Semiconductor Kyushu Inc.)
235
Highly Selective Si3N4/SiOC Etching using Dual Frequency Superimposed (DFS) rf Capacitive Coupled Plasma
A. Takase, J. Nishiwaki, K. Yamamoto, A. Kojima, I. Sakai, H. Hayashi, and T. Ohiwa (Semiconductor Company, Toshiba Corp.)
241
In-situ N2 Plasma Treatment for Cu Surface Control in Dual Damascene Scheme
Shingo Tomohisa, Shigenori Sakamori*, Kazunori Yoshikawa*, Kazumasa Yonekura*, Nobuo Fujiwara*, Kazunori Tsujimoto*, Kyusaku Nishioka**, Hiroshi Kobayashi, and Tatsuo Oomori (Advanced Technology R&D Center, Mitsubishi Electric Corp.,* Wafer Process Engineering Development Div., Renesas Technology Corp., **Semiconductor & Device Group, Mitsubishi Electric Corp.)
247
Advanced Neutral Beam Etching for Future Nano-Scale Devices
Seiji Samukawa, Shuichi Noda, and Tomohiro Kubota (Institute of Fluid Science, Tohoku Univ.)
253
High-speed Si etching and Related Process Integration
Hiroyuki Hashimoto, Masato Hamada, Katsuyuki Ono, and Muneo Harada (MEMS Engineering Dept., Tokyo Electron AT Ltd.)
261
Microplasma Processes for MEMS Application
Takanori Ichiki*,**, Takuya Ideno***, Helen Mei Ling Tan*, Toru Koidesawa***, and Ryo Taura*** (*Faculty of Engineering, The Univ. of Tokyo,**PRESTO, Japan Science and Technology Agency,***Dept. of Electric and Electronics Engineering, Toyo Univ.)
267
Deep Si Etching and Successive Isotropic SiO2 Etching for MEMS Fabrication
Masahiko Tanaka, Yoshiyuki Nozawa, Shoichi Murakami, Hiroto Kanao, and Toshiji Takigawa (Micro Technology Div., Sumitomo Precision Products Co., Ltd.)
275
MEMS Applications of Dry Processes
Masayoshi Esashi (New Industry Creation Hatchery Center, Tohoku Univ.)
281
Design and Synthesis of Nano-Structured Film by PVD Processing
Jeon G. Han and Hyun S. Myung (Dept. of Advanced Materials, Sungkyunkwan Univ.)
289
Nitridation Process by Microwave Excited Plasma to Form Ultra Thin Gate Dielectrics
Toshio Nakanishi, Tomoe Nakayama, Yoshihiro Sato, Jiro Katsuki, and Shigenori Ozaki (SPA Development Engineering Dept., Tokyo Electron AT Ltd.)
293
Mechanism of Post-etch Corrosion on TiN Surface
Hiroyuki Fukumizu, Shuichi Saito, Shingo Honda*, Itsuko Sakai**, Hisataka Hayashi**, and Tokuhisa Ohiwa** (Corporate Manufacturing Engineering Center, Toshiba Corp.,*Advanced Memory Product Development Memory Div., Toshiba Corp.,**Process & Manufacturing Engineering Center, Toshiba Corp.)
299
Fabrication of 7-nm Nanocolumn Structure using Ferritin Iron-Core Masks and Highly Anisotropic Neutral Beam Etching
Tomohiro Kubota, Tomohiro Baba, Hiroyuki Kawashima*, Yukiharu Uraoka*, Takashi Fuyuki*, Ichiro Yamashita*,**, and Seiji Samukawa (Institute of Fluid Science, Tohoku Univ., *Nara Institute of Science and Technology, **Advanced Technology Research Lab., Matsushita Electric Industrial Co., Ltd.)
305
Dry Etching Technology for Magnetoresistive Random Access Memory
Tadayuki Kimura, Hajime Yamagishi, Mitsuharu Shoji, Makoto Motoyoshi, Atsuhiro Ando, Tetsuya Tatsumi, and Keiji Shinohara (Semiconductor Solutions Network Company, Sony Corp.)
311
Plasma Enhanced Deposition of High Dielectric Constant Materials on Silicon
Jane P. Chang (Univ. of California)
317
Novel Chemical Vapor Deposition of Spherically Oxidized Nanocrystaline Silicon (nc-Si) Quantum Dot Multilayer
Akira Kumagai, Yoichiro Numazawa, Yukinobu Murao, Taira Sato*, and Nobuyoshi Koshida* (Anelva Corp., *Tokyo Univ. of Agriculture and Technology)
325
Hydrogen Ion Drift into Underlying Oxides by Rf Bias during High-Density Plasma Chemical Vapor Deposition
Tadashi Yamaguchi, Mahito Sawada, Koyu Asai, Kiyoteru Kobayashi, and Masahiro Yoneda (Production and Technology Unit, Renesas Technology Corp.)
331
Metal Chloride Reduction Chemical Vapor Deposition of TaN Thin Films
Yuzuru Ogura, Yoshiyuki Ooba, Kenichiro Hatayama, and Hitoshi Sakamoto (Advanced Technology Research Center, Mitsubishi Heavy Industries Ltd.)
337
Characterization of SiO2 Films Deposited by VUV-CVD using OMCTS Precursor
Kiyohiko Toshikawa*, **, Junichi Miyano*, Yusuke Yagi*, Atsushi Yokotani**, and Kou Kurosawa** (*WP Engineering Development Dept., Miyazaki Oki Electric Co., Ltd.,**Dept. of Electrical and Electronic Engineering, Univ. of Miyazaki)
341
Effects of Solvent on Properties of Cu Films Prepared by HAPCVD using Cu (EDMDD)2
Kosuke Takenaka, Takao Kaji, Kazunori Koga, Masaharu Shiratani, Yukio Watanabe, and Toshiya Shingen* (Grad. School of Information Science and Electrical Engineering, Kyushu Univ., *Asahi Denka Kogyo K.K.)
347
Integrated Modeling of High Aspect Ratio Contact Etching Process and Stress Analysis for Nano-Scale Memory
Ye-Ro Lee, Tai-Kyung Kim, Won-Young Chung, Young-Tae Kim, *Young-Kyu Cho, *Young-Jin Kim, Young-Kwan Park, and Jeong-Taek Kong (CAE Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd.,*Process Technology Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd.)
353
Dual Frequency Bias Power Benefits on Dielectric Etch Chamber
J. Liu, J. Wang, W.S. Lee, S. Shannon, J. M. Kim, T. Shin, S. Shoji, T. Detrick, B. Pu, and B. Shieh (Dielectric Etch Div., Applied Materials Inc.)
359
Development of Damage Free HfAlO Removal Process using Plasma Treatment
J. W. Sun, C. H. Shin, G. J. Min, C. J. Kang, H. K. Cho, and J. T. Moon (Semiconductor R&D Center, Samsung Electronics Co., Ltd.)
365
< DPS2004 Young Researcher Award Winner >
Selective Etching of HfO2 High-k Gate Material over Si in C4F8/Ar/H2 Plasmas
Kazuo Takahashi and Kouichi Ono (Dept. of Aeronautics and Astronautics, Kyoto Univ.)
369
Nano and Microscale BioPOEMS for Genomics and Proteomics
Luke P. Lee (UCB)
375